INTEGRATED SILICON CAPACITIVE ACCELEROMETER WITH PLL SERVO TECHNIQUE

An integrated silicon capacitive accelerometer has been developed with CMOS and micromachining technology. The accelerometer chip has glass-silicon-glass structure and is 3.7 x 4.5 x 0.9 mm3 in size. A silicon seismic mass is suspended with silicon-oxinitride beams in full symmetry. The sensor capacitance is formed between the silicon mass and a metal electrode on the upper glass. A CMOS capacitance to frequency (C-F) converter is integrated on the silicon chip. The circuit is designed to be stable to temperature and supply voltage. The circuit has a reference capacitor in it, and the drift of the circuit is compensated by the information obtained when the circuit is connected to the reference capacitor. The output frequency of the accelerometer chip varies linearly with acceleration. The force-balancing system has been realized using the accelerometer chip and an outer phase-locked-loop (PLL) servo circuit. The output voltage varies linearly with acceleration, and the sensitivity and offset of the output voltage can be adjusted with the outer circuit parameter.