OPTIMAL PLACEMENT FOR HIERARCHICAL VLSI LAYOUT DESIGN

被引:7
作者
MIR, M [1 ]
IMAM, MH [1 ]
机构
[1] UMM AL QURA UNIV,COLL APPL SCI & ENGN,TAIF,SAUDI ARABIA
来源
MICROPROCESSING AND MICROPROGRAMMING | 1989年 / 25卷 / 1-5期
关键词
D O I
10.1016/0165-6074(89)90192-0
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
收藏
页码:177 / 182
页数:6
相关论文
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