A VLSI FUZZY-LOGIC CONTROLLER WITH RECONFIGURABLE, CASCADABLE ARCHITECTURE

被引：99

作者：

WATANABE, H ^{[1
]}

DETTLOFF, WD ^{[1
]}

YOUNT, KE ^{[1
]}

机构：

[1] MICROELECTR CTR N CAROLINA, RES TRIANGLE PK, NC 27709 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1990年 / 25卷 / 02期

关键词：

Data Storage; Digital--Random Access - Laser Beams - Logic Devices - Mathematical Techniques--Fuzzy Sets - Semiconductor Devices; MOS;

D O I：

10.1109/4.52159

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

control applications has been designed and fabricated in a 1.1-µm 3.3-V, DLM CMOS technology. Up to 102 rules are processed in parallel with a single 688K transistor device. Features include a dynamically reconfigurable and cascadable architecture, TTL-compatible host interface, laser-programmable redundancy, special mode for testability, RAM rule storage, and on-chip fuzzification and defuzzification. A general-purpose fuzzy logic inference engine for real-time 0018-9200/90/0400-0376$01.00 © 1990 IEEE

引用

页码：376 / 382

页数：7

共 12 条

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[2]

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[3]

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KING, PJ ;

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[5]

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[6]

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[7]

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[8]

SUGENO M, 1984, 23RD P IEEE C DEC CO

[9]

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[10]

YASUNOBU SS, P IECON 84, P657

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