RECENT ADVANCES IN VLSI LAYOUT

被引:42
作者
KUH, ES
OHTSUKI, T
机构
[1] WASEDA UNIV, DEPT ELECTR & COMMUN ENGN, TOKYO 169, JAPAN
[2] UNIV CALIF BERKELEY, ELECT RES LAB, BERKELEY, CA 94720 USA
基金
美国国家科学基金会; 日本学术振兴会;
关键词
D O I
10.1109/5.52212
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Research in layout design during the past decade has had a significant impact on the entire VLSI industry. Because of advances made in automatic placement and routing, application specific integrated circuit (ASIQ design now represents a sizeable portion of the chip market. The influence of computer-aided physical design will continue to be felt in the future; for example, in further popularizing the sea-of-gates and building-block design styles. Recent advances in floorplanning and placement and in global and detailed routing pertinent to these design styles are reviewed. Also included are the subjects of computational geometry and layout engines. The former has received a great deal of attention among computer scientists and has found interesting applications in gridless routing and compaction. The latter is becoming an interesting research topic along with other hardware accelerators and special-purpose engines. Although all these subjects are carefully reviewed, much greater emphasis is placed on the discussion of the authors' own research. © 1990 IEEE
引用
收藏
页码:237 / 263
页数:27
相关论文
共 184 条
  • [1] 3-DIMENSIONAL IC TRENDS
    AKASAKA, Y
    [J]. PROCEEDINGS OF THE IEEE, 1986, 74 (12) : 1703 - 1714
  • [2] Asano T., 1986, Layout design and verification, P295
  • [3] ASANO T, 1982, 19TH P DAC, P411
  • [4] BAIRD HS, 1977, 14TH P ACM IEEE DES, P303
  • [5] BENTLEY JL, 1980, IEEE T COMPUT, V29, P571, DOI 10.1109/TC.1980.1675628
  • [6] A SURVEY OF HARDWARE ACCELERATORS USED IN COMPUTER-AIDED-DESIGN
    BLANK, T
    [J]. IEEE DESIGN & TEST OF COMPUTERS, 1984, 1 (03): : 21 - 39
  • [7] BLANK T, 1987, IEEE DESIGN TEST OCT, P46
  • [8] TECHNIQUES FOR MULTILAYER CHANNEL ROUTING
    BRAUN, D
    BURNS, JL
    ROMEO, F
    SANGIOVANNIVINCENTELLI, A
    MAYARAM, K
    DEVADAS, S
    TONY, HK
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1988, 7 (06) : 698 - 712
  • [9] BREUER MA, 1980, J DIGITAL SYST, V4, P393
  • [10] BREUER MA, 1977, 14TH P DES AUT C, P284