A MULTIPROCESSOR ARCHITECTURE FOR THE (M,L)-ALGORITHM SUITABLE FOR VLSI IMPLEMENTATION

被引：13

作者：

MOHAN, S ^{[1
]}

SOOD, AK ^{[1
]}

机构：

[1] WAYNE STATE UNIV, DEPT ELECT ENGN & COMP SCI, DETROIT, MI 48202 USA

来源：

IEEE TRANSACTIONS ON COMMUNICATIONS | 1986年 / 34卷 / 12期

关键词：

D O I：

10.1109/TCOM.1986.1096478

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1218 / 1224

页数：7

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