BENCH-LEVEL CHARACTERIZATION OF A CMOS STANDARD-CELL D-LATCH USING ALPHA-PARTICLE SENSITIVE TEST CIRCUITS

This paper describes a methodology for predicting the SEU susceptibility of a standard-cell D-latch using an alpha-particle sensitive SRAM, SPICE critical charge simulation results, and alpha-particle interaction physics. Measurements were made on a 1.6-mu-m n-well CMOS 4k-bit test SRAM irradiated with an Am-241 alpha-particle source. A collection depth of 6.09-mu-m was determined using these results and TRIM computer code. Using this collection depth and SPICE derived critical charge results on the latch design, an LET threshold of 34 Mev cm2/mg was predicted. Heavy ion tests were then performed on the latch and an LET threshold of 41 MeV cm2/mg was determined.