A MONOLITHIC CMOS 16 CHANNEL, 12 BIT, 10 MICROSECOND ANALOG-TO-DIGITAL CONVERTER INTEGRATED-CIRCUIT

被引:8
作者
MILGROME, OB
KLEINFELDER, SA
机构
[1] Lawrence Berkeley Laboratory, University of California
关键词
D O I
10.1109/23.256648
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A monolithic CMOS 16 channel, 12 bit, 10 microsecond analog to digital converter has been designed and tested. The circuit converts 16 channels in parallel via a single slope ramp and Gray code counter algorithm. When biased for 10.0 us conversion s of a 2 V input range into 4050 voltage bins, and ohmically connected to a computer, initial testing shows typical performance is a noise level of 0.3 bins rms, integral nonlinearity of 4 bins, adjacent channel crosstalk effects less than 1 bin, and total chip power consumption of 110 mW. The chip contains 16 sample and hold circuits, out of range logic, a Gray-to-binary converter, and tri-state data outputs for microprocessor compatibility. The die size is 4.4 by 1.5 mm in a 2 polysilicon, 1.2 micron feature size CMOS process, and has 52 bonding pads. Off chip requirements are a single power supply, a single high speed clock, a precision voltage reference, three biasing resistors, and supply filtering capacitors. This custom circuit has advantages of lower power dissipation and less PC board area than competitive approaches, and is designed for further monolithic system integration. Design details and test results are presented.
引用
收藏
页码:721 / 723
页数:3
相关论文
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[2]  
KLEINFELDER SA, 1991, NUCLEAR PHYSICS B A, V23, P382
[3]   A 12-BIT ANALOG TO DIGITAL CONVERTER FOR VLSI APPLICATIONS IN NUCLEAR-SCIENCE [J].
MILGROME, OB ;
KLEINFELDER, SA ;
LEVI, ME .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1992, 39 (04) :771-775
[4]  
ZIEMER, 1983, SIGNALS SYSTEMS