PROBABILISTIC SIMULATION FOR RELIABILITY-ANALYSIS OF CMOS VLSI CIRCUITS

被引：71

作者：

NAJM, FN

BURCH, R

YANG, P

HAJJ, IN

机构：

[1] UNIV ILLINOIS, COORDINATED SCI LAB, URBANA, IL 61801 USA

[2] TEXAS INSTRUMENTS INC, CTR SEMICOND PROC & DESIGN, MFG PROJECT, DALLAS, TX 75265 USA

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1990年 / 9卷 / 04期

关键词：

D O I：

10.1109/43.45875

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A novel current-estimation approach is developed to support the analysis of electromigration (EM) failures in power supply and ground buses of CMOS VLSI circuits. It uses the original concept of probabilistic simulation to efficiently generate accurate estimates of the expected current waveform required for electromigration analysis. As such, the approach is pattern-independent and relieves the designer of the tedious task of specifying logical input waveforms. This approach has been implemented in the program CREST (CuRrent ESTimator) which has shown excellent accuracy and dramatic speedups compared to traditional approaches. We describe the approach and its implementation, and present the results of numerous CREST runs on real circuits. © 1990 IEEE

引用

页码：439 / 450

页数：12

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