SIMULATION OF THE INFLUENCE OF MANUFACTURING QUALITY ON RELIABILITY OF VIAS

被引:8
作者
DASGUPTA, A
RAMAPPAN, V
机构
[1] CALCE Electronic Packaging Research Center, University of Maryland, College Park, MD
关键词
D O I
10.1115/1.2792081
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Techniques based on physics-of-failure principles are fairly well established for mechanical design of electronic packages. This paper provides an example where such techniques can also be exploited to develop guidelines for assessment of manufacturing quality and its impact on reliability. As a case study this study examines the influence of plating waviness in vias and Plated Through Holes (PTH), on reliability during solder reflow cycles and during subsequent operational thermal cycling. The stress analysis is performed with elastic-plastic finite element models which are seeded with various levels of plating waviness defects. Sensitivity analysis is done with factorial parametric simulation studies based on Design of Experiment (DOE) methods. Buckling and fatigue failure models are used to establish inspection criteria for acceptable thresholds of plating waviness.
引用
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页码:141 / 146
页数:6
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