HIGH-SPEED LOW-POWER CIRCUITS FABRICATED USING A SUB-MICRON NMOS TECHNOLOGY

被引:2
作者
FICHTNER, W
HOFSTATTER, EA
WATTS, RK
BAYRUNS, RJ
BECHTOLD, PF
JOHNSTON, RL
BOULIN, DM
机构
关键词
D O I
10.1109/EDL.1985.26266
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:662 / 664
页数:3
相关论文
共 6 条
[1]  
BARNES J, 1984, DEC IEDM, P545
[2]  
OGURA S, 1982, IEDM, P781
[3]  
ORLOWSKY KJ, 1983, DEC IEDM, P538
[4]  
PEI SS, 1984, OCT IEEE GAAS IC S, P129
[5]   AN AS-P(N+-N-) DOUBLE DIFFUSED DRAIN MOSFET FOR VLSIS [J].
TAKEDA, E ;
KUME, H ;
NAKAGOME, Y ;
MAKINO, T ;
SHIMIZU, A ;
ASAI, S .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1983, 30 (06) :652-657
[6]  
WITTMER NC, 1983, ISSCC, P32