IMPACT OF SILICON SURFACE CHARACTERISTICS ON MOS DEVICE YIELD FOR ULSI

被引：13

作者：

HEYNS, M

HASENACK, C

DEKEERSMAECKER, R

FALSTER, R

机构：

[1] Interuniversity Microelectronics Center (IMEC) Kapeldreef 75

[2] Monsanto Electronic Materials Company, Milton Keynes, Buckinghamshire MK12 5TB, Featherstone Road, Wolverton Mill South

来源：

MICROELECTRONIC ENGINEERING | 1991年 / 10卷 / 3-4期

关键词：

THIN GATE OXIDES; SILICON SURFACE CONTAMINATION; CLEANING; SILICON SURFACE ROUGHNESS; OXIDE BREAKDOWN; METAL PRECIPITATION; SACRIFICIAL OXIDATION;

D O I：

10.1016/0167-9317(91)90025-9

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The quality of thin thermal oxide layers are a primary concern for the yield and reliability of MOS-devices. In this paper it is demonstrated that the electrical characteristics of these layers are strongly influenced by the characteristics of the Si surface prior to the growth of the oxide layer. The effect of the Si surface cleanliness and topography on the gate oxide quality is discussed. Total Reflection X-Ray Fluorescene Analysis measurements, Scanning Tunneling and Scanning Optical Microscopy are used to trace the origin of the observed effects. It is suggested that a combination of a rough Si surface with the presence of (metallic) contamination strongly degrades the oxide breakdown properties.

引用

页码：235 / 257

页数：23

共 55 条

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