MAPPING OF REED-MULLER COEFFICIENTS AND THE MINIMIZATION OF EXCLUSIVE OR-SWITCHING FUNCTIONS

被引：51

作者：

WU, X ^{[1
]}

CHEN, X ^{[1
]}

HURST, SL ^{[1
]}

机构：

[1] UNIV BATH,SCH ELECT ENGN,BATH BA2 7AY,AVON,ENGLAND

来源：

IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES | 1982年 / 129卷 / 01期

关键词：

D O I：

10.1049/ip-e.1982.0004

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A new geometric format, the b//j coefficient map, is introduced, the entries in which are the left brace 0, 1 right brace coefficient values of the Reed-Muller Exclusive-OR expansions by which any given combinatorial function may be expressed. Although similar in format to the classic Karnaugh map, the b//j map entries do not represent the function output in the same manner as do the minterm entries plotted on a Karnaugh map. It is shown that this coefficient map structure may be used to generate any required Exclusive-OR realization of a given function, and provides a deeper insight into the coefficient relationships which arise when input variables are complemented in any Exclusive-OR expansion.

引用

页码：15 / 20

页数：6

共 13 条

[1] FAULT DIAGNOSIS OF DIGITAL SYSTEMS - REVIEW [J].

BENNETTS, RG ;

LEWIN, DW .

COMPUTER JOURNAL, 1971, 14 (02) :199-+

[2]

BIOUL G, 1973, PHILIPS RES REP, V28, P17

[3] ON MINIMAL MODULO 2 SUMS OF PRODUCTS FOR SWITCHING FUNCTIONS [J].

EVEN, S ;

KOHAVI, I ;

PAZ, A .

IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS, 1967, EC16 (05) :671-&

[4]

Hurst S.L., 1978, LOGICAL PROCESSING D

[5]

KOPANDAPANI KL, 1974, IEEE T COMPUT, V23, P332

[6]

KOPANDAPANI KL, 1977, IEEE T COMPUT, V26, P310

[7] MINIMIZATION OF EXCLUSIVE OR AND LOGICAL EQUIVALENCE SWITCHING CIRCUITS [J].

MUKHOPADHYAY, A ;

SCHMITZ, G .

IEEE TRANSACTIONS ON COMPUTERS, 1970, C 19 (02) :132-+

[8]

MULLER DE, 1974, IRE T IT, V21, P6

[9]

PAPAKONSTANTINOU G, 1979, IEEE T COMPUT, V28, P163, DOI 10.1109/TC.1979.1675308

[10] EASILY TESTABLE REALIZATIONS FOR LOGIC FUNCTIONS [J].

REDDY, SM .

IEEE TRANSACTIONS ON COMPUTERS, 1972, C 21 (11) :1183-+

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