EVALUATING ELEMENTARY-FUNCTIONS IN A NUMERICAL COPROCESSOR BASED ON RATIONAL-APPROXIMATIONS

High-speed numerical coprocessors for fixed-point and floating-point arithmetic operations are now available due to recent advances in VLSI technology. Some of these coprocessors are also capable of evaluating elementary functions (logarithm, exponential, trigonometric, inverse trigonometric, etc). Most commonly used methods for hardware evaluation of these functions are based on simple iterative equations, involving only shift and add operations. Their major drawback is their linear convergence which slows down the calculation especially for high-precision floating-point operands. In this paper, we examine a different approach to hardware evaluation of elementary functions for high-precision floatingpoint numbers (in particular, the extended double precision format of the IEEE standard P754). The evaluation is based on rational approximations of the elementary functions, a method which is commonly used in scientific software packages. We present a hardware model of a floating-point numeric coprocessor consisting of a fast adder and a fast multiplier, and add to it minimum hardware required for evaluation of the elementary functions. Next, we derive rational approximations for evaluating the elementary functions and test the accuracy of the results. We then estimate the calculation time of these approximations in the proposed numeric processor. Our final conclusion is that rational approximations can successfully compete with previously used methods when execution time and silicon area are considered. © 1990 IEEE