ANOMALOUS C-V CHARACTERISTICS OF IMPLANTED POLY MOS STRUCTURE IN N+/P+ DUAL-GATE CMOS TECHNOLOGY

被引：61

作者：

LU, CY ^{[1
]}

SUNG, JM ^{[1
]}

KIRSCH, HC ^{[1
]}

HILLENIUS, SJ ^{[1
]}

SMITH, TE ^{[1
]}

MANCHANDA, L ^{[1
]}

机构：

[1] AT&T BELL LABS,MURRAY HILL,NJ 07974

来源：

关键词：

D O I：

10.1109/55.31717

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：192 / 194

页数：3

共 6 条

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[2] Hillenius S. J., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P252
[3] Hillenius S. J., 1985, Proceedings of IEEE International Conference on Computer Design: VLSI in Computers. ICCD '85 (Cat. No.85CH2223-6), P147
[4] DOPANT SEGREGATION IN POLYCRYSTALLINE SILICON
MANDURAH, MM
SARASWAT, KC
HELMS, CR
KAMINS, TI
[J]. JOURNAL OF APPLIED PHYSICS, 1980, 51 (11) : 5755 - 5763
[5] SUBMICROMETER-CHANNEL CMOS FOR LOW-TEMPERATURE OPERATION
SUN, JY
TAUR, Y
DENNARD, RH
KLEPNER, SP
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (01) : 19 - 27
[6] Wong C. Y., 1988, International Electron Devices Meeting. Technical Digest (IEEE Cat. No.88CH2528-8), P238, DOI 10.1109/IEDM.1988.32800