A LOW-POWER 46 NS 256 KBIT CMOS STATIC RAM WITH DYNAMIC DOUBLE WORD LINE

被引:19
作者
SAKURAI, T [1 ]
MATSUNAGA, J [1 ]
ISOBE, M [1 ]
OHTANI, T [1 ]
SAWADA, K [1 ]
AONO, A [1 ]
NOZAWA, H [1 ]
IIZUKA, T [1 ]
KOHYAMA, S [1 ]
机构
[1] TOSHIBA MICROCOMP ENGN CORP,KAWASAKI 210,JAPAN
关键词
D O I
10.1109/JSSC.1984.1052192
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:578 / 585
页数:8
相关论文
共 14 条
[1]  
ANAMI K, 1982, FEB ISSCC, P250
[2]   A FAULT-TOLERANT 30 NS-375 MW 16KX1 NMOS STATIC RAM [J].
HARDEE, KC ;
SUD, R .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1981, 16 (05) :435-443
[3]  
IIZUKA T, 1980, FEB ISSCC, P226
[4]  
IIZUKA T, 1983 S VLSI TECHN, P70
[5]  
KONISHI S, 1982, FEB ISSCC, P258
[6]   SELECTIVE POLYSILICON OXIDATION TECHNOLOGY FOR VLSI ISOLATION [J].
MATSUKAWA, N ;
NOZAWA, H ;
MATSUNAGA, J ;
KOHYAMA, S .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1982, 29 (04) :561-567
[7]  
MINATO O, 1982, FEB ISSCC, P256
[8]  
Miyamoto J., 1983, International Electron Devices Meeting 1983. Technical Digest, P63
[9]  
OCHII K, 1982, FEB ISSCC, P260
[10]   SIMPLE FORMULAS FOR TWO-DIMENSIONAL AND 3-DIMENSIONAL CAPACITANCES [J].
SAKURAI, T ;
TAMARU, K .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1983, 30 (02) :183-185