FORCE-DIRECTED SCHEDULING FOR THE BEHAVIORAL SYNTHESIS OF ASICS

被引：414

作者：

PAULIN, PG ^{[1
]}

KNIGHT, JP ^{[1
]}

机构：

[1] CARLETON UNIV,DEPT ELECTR,OTTAWA K1S 5B6,ONTARIO,CANADA

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1989年 / 8卷 / 06期

关键词：

D O I：

10.1109/43.31522

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：661 / 679

页数：19

共 48 条

[1] ALLOCATION OF MULTIPORT MEMORIES IN DATA PATH SYNTHESIS [J].

BALAKRISHNAN, M ;

MAJUMDAR, AK ;

BANERJI, DK ;

LINDERS, JG ;

MAJITHIA, JC .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1988, 7 (04) :536-540

[2]

Blackman T., 1985, 22nd ACM/IEEE Design Automation Conference Proceedings 1985 (Cat. No.85CH2142-8), P232, DOI 10.1145/317825.317864

[3]

Borriello G., 1988, 25th ACM/IEEE Design Automation Conference. Proceedings 1988 (Cat. No.88CH2540-3), P477, DOI 10.1109/DAC.1988.14802

[4]

Brewer F. D., 1987, 24th ACM/IEEE Design Automation Conference Proceedings 1987, P203, DOI 10.1145/37888.37919

[5]

Camposano R., 1988, VLSI 87: VLSI Design of Digital Systems. Proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration, P61

[6]

CLOUTIER R, 1987, COMMUNICATION NOV

[7]

DAVIDSON S, 1981, IEEE T COMPUT, P460

[8]

DEMAN H, 1986, IEEE DESIGN TEST DEC, P13

[9]

FISHER JA, 1981, IEEE T COMPUT, V30, P478, DOI 10.1109/TC.1981.1675827

[10]

FUHRMAN T, 1988, COMMUNICATION MAY

← 1 2 3 4 5 →