OPTIMUM DESIGN OF DUAL-CONTROL GATE CELL FOR HIGH-DENSITY EEPROMS

被引:14
作者
HIEDA, K
WADA, M
SHIBATA, T
INOUE, S
MOMODOMI, M
IIZUKA, H
机构
关键词
D O I
10.1109/T-ED.1985.22196
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:1776 / 1780
页数:5
相关论文
共 12 条
[1]  
EUZENT B, 1981, 19TH P ANN REL PHYS, P11
[2]   ELECTRICALLY ALTERABLE AVALANCHE-INJECTION-TYPE MOS READ-ONLY MEMORY WITH STACKED-GATE STRUCTURE [J].
IIZUKA, H ;
MASUOKA, F ;
SATO, T ;
ISHIKAWA, M .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1976, 23 (04) :379-387
[3]  
JOHNSON WS, 1980, FEB ISSCC, P152
[4]  
LANCASTER A, 1983, FEB ISSCC, P164
[5]  
LANDERS G, 1982, ELECTRONICS JUN, P127
[6]   FOWLER-NORDHEIM TUNNELING INTO THERMALLY GROWN SIO2 [J].
LENZLINGER, M ;
SNOW, EH .
JOURNAL OF APPLIED PHYSICS, 1969, 40 (01) :278-+
[7]  
MEHROTRA S, 1984, FEB ISSCC, P142
[8]   A 40-NS CMOS E2PROM [J].
STEWART, RG ;
PLUS, D .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1982, 17 (05) :841-846
[9]  
Wada M., 1985, 1985 Symposium on VLSI Technology. Digest of Technical Papers, P96
[10]  
Wada M., 1983, 1983 Symposium on VLSI Technology. Digest of Technical Papers, P114