A PROTOTYPE 3D OPTICALLY INTERCONNECTED NEURAL-NETWORK

被引:10
作者
YAYLA, G
KRISHNAMOORTHY, AV
MARSDEN, GC
ESENER, SC
机构
[1] Department of Electrical and Computer Engineering, University of California-San Diego
[2] AT & T Bell Laboratories, Holmdel NJ 07733
[3] Adieta Blvd. #923, Dallas
关键词
D O I
10.1109/5.333752
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We report the implementation of a prototype three-dimensional (3D) optoelectronic neural network that combines fi ee-space optical interconnects with silicon-VLSI-based optoelectronic circuits. The prototype system consists of a 16-node input, 4-neuron hidden, and a single-neuron output layer, where the denser input-to-hidden-layer connections are optical. The input layer uses PLZT light modulators to generate optical outputs which are distributed over an optoelectronic neural network chip through space-invariant holographic optical interconnects. Optical interconnections provide negligible San-out delay and allow compact, purely on-chip electronic H-tree type San-in structure. The small prototype system achieves a measured 8-bit electronic San-in precision and a calculated maximum speed of 640 million interconnections pet second. The system was tested using synaptic weights learned off-system and was shown to distinguish any vertical line from any horizontal one in an image of 4 x 4 pixels. New, more efficient light detector and small-area analog synaptic circuits and denser optoelectronic neuron layouts are proposed to scale lip the system. A high-speed, Seed-forward optoelectronic synapse implementation density of lip to 10(4)/cm(2) seems feasible using new synapse design. A scaling analysis of the system shows that the optically interconnected neural network implementation can provide higher San-in speed and lower power consumption characteristics than a purely electronic, crossbar-based neural network implementation.
引用
收藏
页码:1749 / 1762
页数:14
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