FABRICATION OF NANOSTRUCTURES WITH MULTILEVEL ARCHITECTURE

被引：25

作者：

TAYLOR, RP ^{[1
]}

ADAMS, JA ^{[1
]}

DAVIES, M ^{[1
]}

MARSHALL, PA ^{[1
]}

BARBER, R ^{[1
]}

机构：

[1] NATL RES COUNCIL CANADA,INST MICROSTRUCT SCI,OTTAWA K1A 0R6,ONTARIO,CANADA

来源：

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 1993年 / 11卷 / 03期

关键词：

D O I：

10.1116/1.586811

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The fabrication of a submicron-sized dot, defined by surface gates on a GaAs/AlGaAs heterostructure, is described. Within the dot, a voltage applied to a 200 nm diam central electrode changes the geometry to that of a ring. Contact to the central electrode was achieved using a layer of silicon nitride as an interlevel insulator. This multilayer architecture is presented as a demonstration of an interconnect technique, featuring alignment to within 10 nm, which may be used to link similar discrete nanostructures to form a circuit.

引用

页码：628 / 633

页数：6

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