A NEW COMPENSATION STRATEGY REDUCING VOLTAGE-CURRENT DISTORTION IN PWM VSI SYSTEMS OPERATING WITH LOW OUTPUT VOLTAGES

被引：167

作者：

CHOI, JW

SUL, SK

机构：

[1] School of Electrical Engineering, Seoul National University, Seoul

来源：

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS | 1995年 / 31卷 / 05期

关键词：

D O I：

10.1109/28.464512

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

In a voltage-fed PWM inverter, the relation between the reference voltage and the output voltage is nonlinear due to the dead time effect and the voltage drop of the switching devices, The nonlinear voltage distortion invokes serious problems such as current waveform distortion and deterioration of the performance, Especially, the clamping of current around the zero crossing point is the most serious problem in the low-frequency region, In this paper, the analysis of the zero current clamping phenomenon is discussed, From this analysis, a novel distorted voltage compensation method which eliminates zero current clamping is presented, Experimental results are also presented to demonstrate the validity of the proposed method.

引用

页码：1001 / 1008

页数：8

共 7 条

[1]

CHOI JW, 1994, IEEE APPL POWER ELEC, P100

[2]

JOSHI RP, 1990, IECON 90, VOLS 1 AND 2, P1034, DOI 10.1109/IECON.1990.149280

[3] WAVE-FORM DISTORTION AND CORRECTION CIRCUIT FOR PWM INVERTERS WITH SWITCHING LAG-TIMES [J].