HARDWARE IMPLEMENTATION OF AN ARTIFICIAL NEURAL-NETWORK USING FIELD-PROGRAMMABLE GATE ARRAYS (FPGAS)

被引：48

作者：

BOTROS, NM

ABDULAZIZ, M

机构：

[1] Department of Electrical Engineering, Southern Illinois University, Carbondale

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 1994年 / 41卷 / 06期

关键词：

Artificial intelligence - Backpropagation - Cellular arrays - Digital signal processing - Logic gates - Microprocessor chips - Personal computers - Speech recognition;

D O I：

10.1109/41.334585

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper we present a hardware implementation of a fully digital multi-layer perceptron artificial neural network using Xilinx Field Programmable Gate Arrays (FPGAs). Each node is implemented with two XC3042 FPGAs and a 1K x 8 EPROM. Training is done off-line on a PC. We have tested successfully the performance of the network.

引用

页码：665 / 667

页数：3

共 5 条

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[2]

Botros N., Abdul-Aziz M., Hardware implementation of an artificial neural network, Proc. IEEE Int. Conf. on Neural Networks, 2, pp. 1252-1257, (1993)

[3]

Feher B., Resonator based digital filters using field programmable gate array elements, Fifth Ann. IEEE Int. ASIC Conf., (1992)

[4]

Satyanarayana S., Tsividis Y., Graf P., A reconfigurable VLSI neural network, IEEE J. Solid-State Circuits, 25, pp. 849-55, (1990)

[5]

Lippmann R., An introduction to computing with neural nets, IEEE-ASSP, pp. 4-22, (1987)

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