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APVS RH - A 128-CHANNEL ANALOG PIPELINE FOR LHC
被引:5
作者:
JONES, LL
FRENCH, M
SELLER, P
机构:
[1] The RD20 Collaboration, Rutherford Appleton Laboratory, United Kingdom, Chilton, Didcot
关键词:
D O I:
10.1109/23.467791
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
A 128 Channel ASIC has been designed for the read-out of silicon strip detectors at the LHC. The circuit is based on the proven concept of ''slow'' shaping and stored sample deconvolution. It features a new 40MHz analogue multiplexer to output all 128 channels through a single connection. The circuit is being fabricated on Harris AVLSIRA radiation hardened technology, which has been demonstrated to meet the environmental requirements of the LHC.
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页码:781 / 785
页数:5
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