OPTIMIZATION OF A SELF-ALIGNED TITANIUM SILICIDE PROCESS FOR SUBMICRON TECHNOLOGY

被引：5

作者：

LEVY, D

DELPECH, P

PAOLI, M

MASUREL, C

VERNET, M

BRUN, N

JEANNE, JP

GONCHOND, JP

ADAHANIFI, M

HAOND, M

DOUVILLE, TT

MINGAM, H

机构：

[1] 78340 Les Clayes-sous-Bois, Bull, Rue Jean Jaures

[2] Bull. Rue Jeans Jaures

[3] Centre National d'Etudes des Telecommunications, 38243 Meylan Cedex

来源：

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING | 1990年 / 3卷 / 04期

关键词：

24;

D O I：

10.1109/66.61965

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

The optimization of a manufacturable self-aligned titanium suicide process is described. In particular, the integrity of the TiSi2 layer has been studied versus the BPSG reflow conditions. Excellent contact resistance and very low leakage currents have been obtained. The good device parameters obtained with both n+ or n+/p+ gate have demonstrated that the self-aligned process can be integrated in a 0.8-um double metal CMOS process. © 1990 IEEE

引用

页码：168 / 175

页数：8

共 25 条

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