AN ALL DIGITAL RECEIVER ARCHITECTURE FOR BANDWIDTH EFFICIENT TRANSMISSION AT HIGH DATA RATES

被引：31

作者：

ASCHEID, G ^{[1
]}

OERDER, M ^{[1
]}

STAHL, J ^{[1
]}

MEYR, H ^{[1
]}

机构：

[1] RHEIN WESTFAL TH AACHEN, LEHRSTUHL ELEKTR REGELUNGSTECHN, D-5100 AACHEN, FED REP GER

来源：

IEEE TRANSACTIONS ON COMMUNICATIONS | 1989年 / 37卷 / 08期

关键词：

D O I：

10.1109/26.31179

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：804 / 813

页数：10

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