ULTRAFAST SHALLOW-BURIED-CHANNEL CCDS WITH BUILT-IN DRIFT FIELDS

被引：4

作者：

LATTES, AL

MUNROE, SC

SEAVER, MM

机构：

[1] Lincoln Laboratory, Massachusetts Institute of Technology, Lexington

[2] Lincoln Laboratory, Massachusetts Institute of Technology, Lexington

来源：

IEEE ELECTRON DEVICE LETTERS | 1991年 / 12卷 / 03期

关键词：

D O I：

10.1109/55.75726

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have designed, fabricated, and tested shallow-buried-channel charge-coupled devices (CCD's) with built-in drift fields. The delay lines are operated with 5-V two-phase clocks, and a potential gradient is permanently built into the storage gates by a step implant in order to improve the charge transfer efficiency (CTE) at high clocking rates. The CCD's with the built-in drift fields were tested up to the 325-MHz limit of the existing clock drivers with no degradation in the CTE (> 0.99996), while the equivalent CCD's with uniformly doped storage wells degrade rapidly above 240 MHz. These results are consistent with two-dimensional computer simulations.

引用

页码：104 / 107

页数：4