A LOW-NOISE AMPLIFIER WITH AUTOMATIC GAIN-CONTROL AND ANTICLIPPING CONTROL IN CMOS TECHNOLOGY

A CMOS low-noise amplifier with two variable gain ranges of 6 and 9 dB is presented. Variable gain is realized by using linearized MOS resistive circuits (MRC's) as voltage-controlled resistors. One of these "resistors" is located in the feedback loop of a transresistance output stage and the other is in the bias current generator of the transconductance input stage. Using compatible lateral bipolar transistors (CLBT's) in the fully differential transconductance input stage, the circult takes advantage of the linear dependence of transconductance on bias current. The equivalent input noise is 14 nV/square-root Hz and free from 1/f noise in the voice band. The circuit is integrated in a 2-mu-m CMOS process and has an active area of 0.8 mm2.