CHARACTERISTICS OF NMOS/GAA (GATE-ALL-AROUND) TRANSISTORS NEAR THRESHOLD

被引:16
作者
FRANCIS, P
TERAO, A
FLANDRE, D
VANDEWIELE, F
机构
[1] Laboratoire de Microélectronique, Université Catholique de Louvain, 1348 Louvain-la-Neuve
关键词
D O I
10.1016/0167-9317(92)90551-2
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Simulations of drain current and intrinsic gate capacitances of nMOS/GAA transistors are presented and compared with experimental results. On the basis of the insight they give into the unique behaviour of those devices, new hypotheses have emerged and yielded an analytical model valid around the threshold voltage.
引用
收藏
页码:815 / 818
页数:4
相关论文
共 3 条
[1]  
Colinge, Gao, Romano-Rodriguez, Maes, Claeys, Tech. Digest IEDM, (1990)
[2]  
Terao, Flandre, Lora-Tamayo, Van de Wiele, IEEE Electron Device Lett., 12, 12, (1991)
[3]  
Terao, Van de Wiele, ESSDERC 91, (1991)