A 13-B 10-MSAMPLE/S ADC DIGITALLY CALIBRATED WITH OVERSAMPLING DELTA-SIGMA CONVERTER

被引:36
作者
SHU, TH [1 ]
SONG, BS [1 ]
BACRANIA, K [1 ]
机构
[1] UNIV ILLINOIS,DEPT ELECT & COMP ENGN,URBANA,IL 61801
基金
美国国家科学基金会;
关键词
D O I
10.1109/4.375965
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Two key techniques necessary to digitally calibrate multistep or pipelined converters are demonstrated in a differential 5-V, 13-b, 10-Msample/s analog-to-digital converter (ADC). One technique, called code-error calibration, is to linearize the transfer characteristic of digital-to analog converters (DAC's) while the other, called gain-error proration, is to evenly distribute interstage gain errors over the full conversion range, The core of the former technique is an oversampling delta-sigma ratio calibrator working synchronously with the converter, This digital calibration process constantly tracks and updates the code errors without interfering with the normal operation, The prototype converter fabricated using a 1.4-mu m BiCMOS process consumes 360 mW with a 5-V single supply and exhibits a signal-to-noise ratio of 71 dB and a maximum end-point integral nonlinearity of 1.8 LSB at a 13-b level, The proposed techniques can be incorporated into general multistep or pipelined ADC's without sacrificing the conversion speed.
引用
收藏
页码:443 / 452
页数:10
相关论文
共 16 条
[1]   THE DESIGN OF SIGMA-DELTA MODULATION ANALOG-TO-DIGITAL CONVERTERS [J].
BOSER, BE ;
WOOLEY, BA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1988, 23 (06) :1298-1308
[2]   A 50-MHZ MULTIBIT SIGMA-DELTA MODULATOR FOR 12-B 2-MHZ A/D CONVERSION [J].
BRANDT, BP .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (12) :1746-1756
[3]   THE STRUCTURE OF QUANTIZATION NOISE FROM SIGMA-DELTA MODULATION [J].
CANDY, JC ;
BENJAMIN, OJ .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1981, 29 (09) :1316-1323
[4]   A MONOLITHIC 20-B DELTA-SIGMA A/D CONVERTER [J].
DELSIGNORE, BP ;
KERTH, DA ;
SOOCH, NS ;
SWANSON, EJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (06) :1311-1317
[5]   A SELF-CALIBRATION TECHNIQUE FOR MONOLITHIC HIGH-RESOLUTION D/A CONVERTERS [J].
GROENEVELD, DWJ ;
SCHOUWENAARS, HJ ;
TERMEER, HAH ;
BASTIAANSEN, CAA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (06) :1517-1522
[6]   A 15-B 1-MSAMPLE/S DIGITALLY SELF-CALIBRATED PIPELINE ADC [J].
KARANICOLAS, AN ;
LEE, HS ;
BACRANIA, KL .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1993, 28 (12) :1207-1215
[7]   A 12-BIT 1-MHZ 2-STEP FLASH ADC [J].
KERTH, DA ;
SOOCH, NS ;
SWANSON, EJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (02) :250-255
[8]   A SELF-CALIBRATING 15 BIT CMOS A/D CONVERTER [J].
LEE, HS ;
HODGES, DA ;
GRAY, PR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (06) :813-819
[9]   DIGITAL-DOMAIN CALIBRATION OF MULTISTEP ANALOG-TO-DIGITAL CONVERTERS [J].
LEE, SH ;
SONG, BS .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (12) :1679-1688
[10]   INTERSTAGE GAIN PRORATION TECHNIQUE FOR DIGITAL-DOMAIN MULTISTEP ADC CALIBRATION [J].
LEE, SH ;
SONG, BS .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 1994, 41 (01) :12-18