LATCHUP PREVENTION USING AN N-WELL EPI-CMOS PROCESS

被引:4
作者
HOLLY, PJ [1 ]
AKERS, LA [1 ]
机构
[1] ARIZONA STATE UNIV,DEPT ELECT ENGN,TEMPE,AZ 85281
关键词
D O I
10.1109/T-ED.1983.21308
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:1403 / 1405
页数:3
相关论文
共 9 条
[1]  
Combs S. R., 1981, International Electron Devices Meeting, P346
[2]   LATCH-UP IN CMOS INTEGRATED-CIRCUITS [J].
GREGORY, BL ;
SHAFER, BD .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1973, NS20 (06) :293-299
[3]   MINORITY-CARRIER REFLECTING PROPERTIES OF SEMICONDUCTOR HIGH-LOW JUNCTIONS [J].
HAUSER, JR ;
DUNBAR, PM .
SOLID-STATE ELECTRONICS, 1975, 18 (7-8) :715-716
[4]  
OCHOA A, 1979, IEEE T NUCL SCI, V26
[5]  
OHZONE T, 1980, FEB ISSCC, P236
[6]  
OHZONE T, 1980, IEEE T ELECTRON DEVI, V27
[7]  
SHIMOHIGASHI K, 1980, DEC IEDM, P835
[8]  
SUGINO M, 1983, IEEE T ELECTRON DEVI, V30
[9]  
YU KK, 1981, FEB ISSCC, P208