A TIME-DIVISION MULTIPLEXER IC FOR BIT RATES UP TO ABOUT 2 GBITS/S

被引：14

作者：

REIN, HM

DANIEL, D

DERKSEN, RH

LANGMANN, U

BOSCH, BG

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1984年 / 19卷 / 03期

关键词：

D O I：

10.1109/JSSC.1984.1052142

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：306 / 310

页数：5

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[6] SIMPLE BUT EFFICIENT ANALOG-COMPUTER FOR SIMULATION OF HIGH-SPEED INTEGRATED-CIRCUITS [J].

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REIN, HM .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1977, 12 (01) :51-58

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[8] IMPROVING LARGE-SIGNAL MODELS OF BIPOLAR-TRANSISTORS BY DIVIDING INTRINSIC BASE INTO 2 LATERAL SECTIONS [J].

REIN, HM .

ELECTRONICS LETTERS, 1977, 13 (02) :40-41

[9]

REIN HM, 1968, ARCH ELEKTR UBERTRAG, V22, P322

[10]

REIN HM, 1968, THESIS U STUTTGART S

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