ANALOG VLSI MODEL OF BINAURAL HEARING

被引：32

作者：

MEAD, CA

ARREGUIT, X

LAZZARO, J

机构：

[1] California Institute of Technology, Pasadena

[2] California Institute of Technology, Department of Electrical and Computer Engineering, University of Colorado, Boulder, CO 80309, Pasadena, CA

来源：

IEEE TRANSACTIONS ON NEURAL NETWORKS | 1991年 / 2卷 / 02期

关键词：

D O I：

10.1109/72.80333

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

The stereausis model of biological auditory processing was proposed as a representation that encodes both binaural and spectral information in a unified framework. We describe a working analog VLSI chip that implements this model of early auditory processing in the brain. The chip is a 100 000-transistor integrated circuit that computes the stereausis representation in real time, using continuous-time analog processing. The chip receives two audio inputs, representing sound entering the two ears, computes the stereausis representation, and generates output signals that can directly drive a color CRT display.

引用

页码：230 / 236

页数：7

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