64-KBIT BLOCK ADDRESSED CHARGE-COUPLED MEMORY

被引：7

作者：

MOHSEN, AM ^{[1
]}

BOWER, RW ^{[1
]}

WILDER, EM ^{[1
]}

ERB, DM ^{[1
]}

机构：

[1] MNEMONICS INC, CUPERTINO, CA 95014 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1976年 / 11卷 / 01期

关键词：

D O I：

10.1109/JSSC.1976.1050674

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：49 / 58

页数：10

共 14 条

[1] PERFORMANCE-CHARACTERISTICS OF OFFSET-GATE CHARGE-COUPLED DEVICE [J].

BOWER, RW ;

ZIMMERMAN, TA ;

MOHSEN, AM .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1975, ED22 (02) :72-74

[2] 2-PHASE OFFSET GATE CCD [J].

BOWER, RW ;

ZIMMERMAN, TA ;

MOHSEN, AM .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1975, ED22 (02) :70-72

[3]

BOWER RW, 1973, DEC TECH DIG INT EL, P30

[4]

BOWER RW, 1974, DEC IEEE INT EL DEV

[5] DESIGN OF A 16-384-BIT SERIAL CHARGE-COUPLED MEMORY DEVICE [J].

CHOU, S .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (01) :10-18

[6]

COLLINS DR, 1973, ISSCC DIG TECH PAPER, P136

[7]

HODGES DA, 1972, SEMICONDUCTOR MEMORI, P175

[8] FABRICATION AND PERFORMANCE OF OFFSET-MASK CHARGE-COUPLED-DEVICES [J].

MOHSEN, AM ;

RETAJCZYK, TF .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (01) :180-188

[9] 16-KBIT BLOCK ADDRESSED CHARGE-COUPLED MEMORY DEVICE [J].

MOHSEN, AM ;

TOMPSETT, MF ;

FULS, EN ;

ZIMANY, EJ .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (01) :40-48

[10]

MOHSEN AM, 1974, DEC IEEE INT EL DEV

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