CIRCUIT-DESIGN FOR A HIGH-TC JOSEPHSON SAMPLER

被引：20

作者：

HIDAKA, M

TSAI, JS

机构：

[1] Fundamental research Laboratories, NEC Corporation, Tsukuba 305

来源：

IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY | 1995年 / 5卷 / 02期

关键词：

D O I：

10.1109/77.403310

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose a high-speed and high-sensitivity sampler circuit using high Tc superconducting (HTS) Josephson junctions. This circuit consists of five non-latching junctions, superconducting lines and a superconducting ground-plane. A main feature of this circuit is a non-latching comparator junction whose switching generates a circulating current in a superconducting loop. Computer simulation and prototype layout were performed to study its ability and feasibility.

引用

页码：3353 / 3356

页数：4

共 12 条

[1] HIGH-TC SUPERCONDUCTOR-NORMAL-SUPERCONDUCTOR JOSEPHSON-JUNCTIONS USING CARUO3 AS THE METALLIC BARRIER [J].