A 12-BIT ANALOG TO DIGITAL CONVERTER FOR VLSI APPLICATIONS IN NUCLEAR-SCIENCE

被引:17
作者
MILGROME, OB
KLEINFELDER, SA
LEVI, ME
机构
[1] Lawrence Berkeley Laboratory 1, University of California, Berkeley, CA
关键词
7;
D O I
10.1109/23.159704
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A high density monolithic analog to digital converter (ADC) has been designed and tested. The ADC features small silicon area and low power consumption for use in multichannel circuits for massively parallel particle physics detectors. The tested chip contains a linear ramp, precision high speed comparators, a pipelined counter, and double buffering storage latches fabricated in a 2 micron 2 polysilicon complementary metal-oxide-semiconductor (CMOS) technology. The prototype integrated circuit successfully combines digital frequencies in excess of 70 MHz, with analog signals smaller than 1 mV. Test results show 1/4096 rms errors at conversion rates above 30 KHz, with less than 4 mW per channel power dissipation.
引用
收藏
页码:771 / 775
页数:5
相关论文
共 7 条
[1]   A RAIL-TO-RAIL CMOS OP AMP [J].
BABANEZHAD, JN .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1988, 23 (06) :1414-1417
[2]  
BHATTACHARYA A, 1990, FRONT END ELECTRONIC
[3]   FULLY DIFFERENTIAL ADC WITH RAIL-TO-RAIL COMMON-MODE RANGE AND NONLINEAR CAPACITOR COMPENSATION [J].
HESTER, RK ;
TAN, KS ;
DEWIT, M ;
FATTARUSO, JW ;
KIRIAKI, S ;
HELLUMS, JR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (01) :173-183
[4]  
HOROWITZ P, 1980, ART ELECTRONICS, P321
[5]  
KLEINFELDER SA, 1991, NUCLEAR PHYSICS B A, V23, P382
[6]   ANALOG-TO-DIGITAL CONVERSION USING CUSTOM CMOS ANALOG MEMORY FOR THE EOS TIME PROJECTION CHAMBER [J].
LEE, KL ;
ARTHUR, AA ;
JONES, RW ;
MATIS, HS ;
NAKAMURA, M ;
KLEINFELDER, SA ;
RITTER, HG ;
WIEMAN, HH .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1991, 38 (02) :344-347
[7]   MATCHING PROPERTIES OF MOS-TRANSISTORS [J].
PELGROM, MJM ;
DUINMAIJER, ACJ ;
WELBERS, APG .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (05) :1433-1440