AN ANALOG FRONT-END SIGNAL PROCESSOR FOR A 64-MBITS/S PRML HARD-DISK DRIVE CHANNEL

被引：5

作者：

CHOI, D ^{[1
]}

PIERSON, R ^{[1
]}

TRAFTON, F ^{[1
]}

SHEAHAN, B ^{[1
]}

GOPINATHAN, V ^{[1
]}

MAYFIELD, G ^{[1
]}

RANMUTHU, I ^{[1
]}

VENKATRAMAN, S ^{[1
]}

PAWAR, V ^{[1
]}

LEE, O ^{[1
]}

GIOLMA, W ^{[1
]}

KRENIK, W ^{[1
]}

ABBOTT, W ^{[1
]}

机构：

[1] QUANTUM CORP,MILPITAS,CA 95035

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1994年 / 29卷 / 12期

关键词：

D O I：

10.1109/4.340437

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This BiCMOS IC contains all the analog front-end components necessary for the design of a 21-64 Mb/s HDD channel, Major functional blocks include an automatic gain control circuit having both analog and digital modes of operation, a programmable filter with 6-33 MHz bandwidth range, two phase-locked loops with 24-72 MHz center frequency ranges, a differential 6 bit flash AID converter with 24-72 MHz sampling rates, and a write precompensator having 600 ps step size.

引用

页码：1596 / 1605

页数：10

共 11 条

[1]

ABBOTT W, 1994, INT SOL STAT CIRC C, P284

[2]

CHOI D, 1994, ISSCC FEB, P282

[3] A PRML SYSTEM FOR DIGITAL MAGNETIC RECORDING [J].