HEMISPHERICAL GRAINED SI FORMATION ON IN-SITU PHOSPHORUS-DOPED AMORPHOUS-SI ELECTRODE FOR 256MB DRAMS CAPACITOR

被引：17

作者：

WATANABE, H ^{[1
]}

TATSUMI, T ^{[1
]}

OHNISHI, S ^{[1
]}

KITAJIMA, H ^{[1
]}

HONMA, I ^{[1
]}

IKARASHI, T ^{[1
]}

ONO, H ^{[1
]}

机构：

[1] NEC CORP LTD,MICROELECTR RES LABS,IBARAKI,OSAKA 305,JAPAN

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1995年 / 42卷 / 07期

关键词：

D O I：

10.1109/16.391206

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The cylindrical capacitor structure with hemispherical grained-Si (HSG-Si) described here reliably achieves a cell capacitance of 30 fF in a 0.4 mu m-high storage electrode with a cell area of a 0.72 mu m(2) for 256 Mbit dynamic random access memory. An HSG-Si formation technology using Si2H6-molecule irradiation and annealing enables control of the grain density and grain size of HSG-Si fabricated selectively on the whole surface of phosphorus-doped amorphous Si cylindrical electrodes.

引用

页码：1247 / 1254

页数：8

共 16 条

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