MARS - A MULTIPROCESSOR-BASED PROGRAMMABLE ACCELERATOR

被引：18

作者：

AGRAWAL, P

DALLY, WJ

FISCHER, WC

JAGADISH, HV

KRISHNAKUMAR, AS

TUTUNDJIAN, R

机构：

[1] MIT,COMP SCI,CAMBRIDGE,MA 02139

[2] AT&T BELL LABS,DIGITAL ARCHITECTURES RES DEPT,TECH STAFF,MURRAY HILL,NJ 07974

来源：

IEEE DESIGN & TEST OF COMPUTERS | 1987年 / 4卷 / 05期

关键词：

COMPUTER ARCHITECTURE - Microprogramming - COMPUTER PROGRAMMING - Algorithms - INTEGRATED CIRCUITS; VLSI - Computer Simulation;

D O I：

10.1109/MDT.1987.295211

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A description is given of MARS (microprogrammable accelerator for rapid simulations), a multiprocessor-based hardware accelerator that can efficiently implement a wide range of computationally complex algorithms. MARS is ideally suited for performing event-driven simulation of VLSI circuits. With performance comparable to that of other existing special-purpose hardware simulators, MARS has the added advantage of flexibility due to VLSI processors custom-designed to be microprogrammable and reconfigurable.

引用

页码：28 / 36

页数：9