A COMPARISON OF BINARY DELAY-LOCK TRACKING-LOOP IMPLEMENTATIONS

被引:58
作者
GILL, WJ
机构
关键词
D O I
10.1109/TAES.1966.4501791
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
引用
收藏
页码:415 / +
页数:1
相关论文
共 11 条
[1]  
Elspas B., 1959, IRE T CIRCUIT THEORY, V6, P45, DOI DOI 10.1109/TCT.1959.1086506
[2]  
GILL WJ, 1965, 1 IEEE ANN COMM CONV
[3]  
GILL WJ, 1963, IEEE T COMMUN, VCS11, P246
[4]  
GOLOMB SW, 1964, DIGITAL COMMUNICATIO
[5]   DESIGN AND PERFORMANCE OF PHASE-LOCK CIRCUITS CAPABLE OF NEAR-OPTIMUM PERFORMANCE OVER A WIDE RANGE OF INPUT SIGNAL AND NOISE LEVELS [J].
JAFFE, R ;
RECHTIN, E .
IRE TRANSACTIONS ON INFORMATION THEORY, 1955, 1 (01) :66-76
[6]  
MAGILL DT, 1965, 1965 IEEE INT CONV
[7]  
MULLOY CS, 1962, THESIS US NAVAL POST
[8]  
Spilker J.J., 1961, IEEE PROC IRE, V49, P1403, DOI DOI 10.1109/JRPROC.1961.287899
[9]  
SPILKER JJ, 1963, IEEE T SPACE EL TEL, V9, P1
[10]   APPLICATION OF DELAY-LOCK RADAR TECHNIQUES TO DEEP-SPACE TASKS [J].
WARD, RB .
IEEE TRANSACTIONS ON SPACE ELECTRONICS AND TELEMETRY, 1964, SE10 (02) :49-&