AN SEM BASED SYSTEM FOR A COMPLETE CHARACTERIZATION OF LATCH-UP IN CMOS INTEGRATED-CIRCUITS

被引：5

作者：

CANALI, C

FANTINI, F

GIANNINI, M

SENIN, A

VANZI, M

ZANONI, E

机构：

[1] TELETTRA SPA,DEPT RELIABIL & QUAL,I-40123 BOLOGNA,ITALY

[2] INGN C OLIVETTI SPA,LAATA,I-10010 SCARMAGNO,ITALY

[3] CTR STUD & APPL TECNOL AVANZATE,I-70010 VALENZANO,ITALY

[4] UNIV BARI,DIPARTIMENTO ELETTROTECN & ELETTR,I-70125 BARI,ITALY

来源：

SCANNING | 1986年 / 8卷 / 01期

关键词：

D O I：

10.1002/sca.4950080105

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

引用

页码：20 / 33

页数：14

共 19 条

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[2]

Davidson S. M., 1983, 21st Annual Proceedings on Reliability Physics 1983, P130, DOI 10.1109/IRPS.1983.361973

[3] A SEM TECHNIQUE FOR EXPERIMENTALLY LOCATING LATCH-UP PATHS IN INTEGRATED-CIRCUITS [J].

DRESSENDORFER, PV ;

ARMENDARIZ, MG .

IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1980, 27 (06) :1688-1693

[4]

EISTREICH DB, 1980, G2019 STANF EL LAB T

[5]

FANTINI F, UNPUB IEEE J SOLID S

[6]

FUJIOKA H, 1983, SCANNING ELECTRON MI, V3, P1157

[7]

Henley F. J., 1983, 21st Annual Proceedings on Reliability Physics 1983, P122, DOI 10.1109/IRPS.1983.361972

[8]

HIATT J, 1981, 19TH IEEE ANN P INT, P122

[9]

Khurana N., 1984, 22nd Annual Proceedings on Reliability Physics 1984 (Catalog No. 84CH1990-1), P122, DOI 10.1109/IRPS.1984.362029

[10]

KOTORMAN L, 1980, SCANNING ELECTRON MI, V4, P77

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