A VLSI LAYOUT FOR A PIPELINED DADDA MULTIPLIER

被引:18
作者
CAPPELLO, PR [1 ]
STEIGLITZ, K [1 ]
机构
[1] PRINCETON UNIV,DEPT ELECT ENGN & COMP SCI,PRINCETON,NJ 08544
来源
ACM TRANSACTIONS ON COMPUTER SYSTEMS | 1983年 / 1卷 / 02期
关键词
D O I
10.1145/357360.357366
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
引用
收藏
页码:157 / 174
页数:18
相关论文
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