INTEGRATED-CIRCUIT DESIGN OPTIMIZATION USING A SEQUENTIAL STRATEGY

被引:65
作者
BERNARDO, MC
BUCK, R
LIU, LS
NAZARET, WA
SACKS, J
WELCH, WJ
机构
[1] AT&T BELL LABS,HOLMDEL,NJ 07733
[2] UNIV WATERLOO,DEPT STATS & ACTUARIAL SCI,WATERLOO N2L 3G1,ONTARIO,CANADA
[3] UNIV WATERLOO,INST IMPROVEMENT QUAL & PROD,WATERLOO N2L 3G1,ONTARIO,CANADA
基金
美国国家科学基金会;
关键词
D O I
10.1109/43.124423
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We describe a sequential strategy for designing manufacturable integrated circuits using available CAD tools. The methods allow designers to make performance insensitive to unwanted variations in device and process model parameters, environmental fluctuations, material impurities, and other errors which are unavoidable in design and manufacturing processes. Optimizing the performance of complex designs in the presence of unwanted parameter variations can take a prohibitively large number of computer runs. Our methods overcome this complexity by combining sequential experimentation with modeling of the CAD simulator outputs as realizations of stochastic processes. These models give inexpensive approximations that enable us to locate subregions on which to continue the search for the optimal design. The multistage experimentation reduces the number of simulation runs required to obtain sufficiently accurate approximations. We are able to treat circuits with many parameters, performances, and criteria. Included are two examples where improved designs have been found by our methods. The first is a zero-temperature-coefficient current reference IC. The second is a gallium arsenide voltage level shifter IC that has multiple performances of interest.
引用
收藏
页码:361 / 372
页数:12
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