QUANTUM TRANSPORT IN POLYCRYSTALLINE SILICON SLIT NANO-WIRE

Electrical conduction characteristics of polycrystalline silicon (poly-Si) ''slit nano wire'' between room temperature and 2 K are reported. The slit nano wire is fabricated by the self-aligned confinement of a 100-nm-wide and 100-mn-deep trench formed in silicon substrate; the wire is 5-8 nm wide, 10-20 nm high and has grain length of around 100 nm. The resistance increases with the reduction of temperature, which might be due to the quasi-one-dimensional structure of the slit nano wire. The conductance exhibits a dip of about 30 mV below 10 K, which is attributed to a barrier height of about 1 meV at the grain boundary of the poly-Si layer.