HIGH-ORDER SINGLE-STAGE SINGLE-BIT OVERSAMPLING A/D CONVERTER STABILIZED WITH LOCAL FEEDBACK LOOPS

被引:30
作者
MOUSSAVI, SM [1 ]
LEUNG, BH [1 ]
机构
[1] UNIV WATERLOO,DEPT ELECT & COMP ENGN,WATERLOO N2L 3G1,ONTARIO,CANADA
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1994年 / 41卷 / 01期
关键词
D O I
10.1109/82.275665
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new method for the stabilization of high-order (> 2) single-stage single-bit oversampling A/D converters is proposed. In this approach, the stability of the modulator is achieved by preventing any unbounded increase in the internal node-voltages through the insertion of local feedback signals inside the modulator loop. In the past, absolute bounds for stability have been derived for the first-order converter. This property is exploited in stabilizing a higher order loop by activating local first-order loops as soon as the internal integrators overload. With local feedback, individual integrators are prevented from saturating and the output voltages are within the proper bounds. The error caused by the local feedback signals is cancelled by feeding these signals through alternate signal paths, in a way similar to the quantization noise cancellation mechanism in a MASH architecture. Since the frequency of overloading can be made very low by proper design, the effect of imperfect cancellation due to mismatches in the two signal paths caused by the modulator nonidealities is quite small. Hence, compared to the inherently stable MASH architectures, the proposed approach achieves stability and is yet much less sensitive to component mismatches. In a sampled data environment where the integrator is realized using opamps, this translates into a low opamp gain requirement. Simulation results confirm that third order modulators using opamps with gain as low as 50 achieve a peak signal-to-noise ratio (SNR) of about 83 dB with an oversampling ratio of 64. This is less than 1 dB from the SNR achieved with infinite opamp gain. In this modern day of low voltage CMOS design, such a low opamp gain can be easily realized since no cascode stage is required.
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页码:19 / 25
页数:7
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