DW-LOCOS - A CONVENIENT VLSI ISOLATION TECHNIQUE

被引:10
作者
BELLUTTI, P [1 ]
BOSCARDIN, M [1 ]
SONCINI, G [1 ]
ZEN, M [1 ]
ZORZI, N [1 ]
机构
[1] UNIV TRENT,DIPARTIMENTO INGN MAT,I-38050 TRENT,ITALY
关键词
D O I
10.1088/0268-1242/10/12/022
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An alternative process scheme for dry local oxidation is presented. It has several advantages when compared with the conventional wet process. For example, dry local oxidation of silicon reduces the bird's beak length as well as retarding the appearance of field oxide thinning in submicrometre mask openings. Furthermore, it avoids detrimental gate oxide thinning and reduces the complexity of the process, because it can be performed at the same time as the well drive-in (DW-LOCOS). Preliminary results demonstrate that there is no degradation in the electrical characteristics of diodes and MOS capacitor test structures, thus permitting DW-LOCOS to be advantageously incorporated into CMOS-VLSI processing sequences.
引用
收藏
页码:1700 / 1705
页数:6
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