THE MAGIC VLSI LAYOUT SYSTEM

被引:31
作者
OUSTERHOUT, JK
HAMACHI, GT
MAYO, RN
SCOTT, WS
TAYLOR, GS
机构
[1] Univ of California, Berkeley,, Berkeley, CA, USA, Univ of California, Berkeley, Berkeley, CA, USA
来源
IEEE DESIGN & TEST OF COMPUTERS | 1985年 / 2卷 / 01期
关键词
D O I
10.1109/MDT.1985.294681
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
14
引用
收藏
页码:19 / 30
页数:12
相关论文
共 14 条
[1]  
Burstein M., 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, VCAD-2, P223, DOI 10.1109/TCAD.1983.1270040
[2]  
HAMACHI G, 1984, 21ST P DES AUT C, P173
[3]  
KELLER KH, 1982, SPR P COMPCON, P305
[5]   CORNER STITCHING - A DATA-STRUCTURING TECHNIQUE FOR VLSI LAYOUT TOOLS [J].
OUSTERHOUT, JK .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1984, 3 (01) :87-100
[6]  
OUSTERHOUT JK, 1981, VLSI DESIGN, V2, P34
[7]  
RIVEST RL, 1982, 19TH P DES AUT C, P418
[8]  
ROSENBERG J, 1983, 20TH P DES AUT C, P31
[9]  
SCOTT WS, 1984, 21ST P DES AUT C, P166
[10]  
TAYLOR GS, 1984, 21ST P DES AUT C, P160