THE STANFORD DASH MULTIPROCESSOR

被引：187

作者：

LENOSKI, D

LAUDON, J

GHARACHORLOO, K

WEBER, WD

GUPTA, A

HENNESSY, J

HOROWITZ, M

LAM, MS

机构：

[1] STANFORD UNIV,DEPT COMP SCI,STANFORD,CA 94305

[2] STANFORD UNIV,DEPT ELECT ENGN,STANFORD,CA 94305

[3] STANFORD UNIV,COMP SYST LAB,STANFORD,CA 94305

来源：

COMPUTER | 1992年 / 25卷 / 03期

基金：

美国国家科学基金会;

关键词：

D O I：

10.1109/2.121510

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

[No abstract available]

引用

页码：63 / 79

页数：17

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LENOSKI D, 1990, 17TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, P148, DOI 10.1109/ISCA.1990.134520

[10] TOLERATING LATENCY THROUGH SOFTWARE-CONTROLLED PREFETCHING IN SHARED-MEMORY MULTIPROCESSORS [J].

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GUPTA, A .

JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 1991, 12 (02) :87-106

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