A SINGLE-CHIP IBM SYSTEM/390 FLOATING-POINT PROCESSOR IN CMOS

A floating-point processor with the IBM System/390(R) architecture is implemented in one CMOS VLSI chip containing over 70 000 cells (equivalent inverters), using a transistor channel length of 0.5 mum. All floating-point instructions are hard-wired, including the binary integer multiplications. The chip is implemented in a 1-mum technology with three layers of metal. All circuits are realized in standard cells except for a floating-point register and a multiplier array macro, which are custom designed to save chip area. Instructions are performed in a five-stage pipeline with a maximum operating frequency of 37 MHz. The chip measures 12.7 mm x 12.7 mm, and dissipates 2 W. It is part of the chip set which forms the core of the IBM Enterprise System/9000(TM) Type 9221 entry-level models.