PERIPHERAL CIRCUITS FOR ONE TRANSISTOR CELL MOS RAMS

被引:23
作者
FOSS, RC [1 ]
HARLAND, R [1 ]
机构
[1] MICROSYST INT LTD,OTTAWA,ONTARIO,CANADA
关键词
D O I
10.1109/JSSC.1975.1050608
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:255 / 261
页数:7
相关论文
共 3 条
[1]   8K B RANDOM-ACCESS MEMORY CHIP USING ONE-DEVICE FET CELL [J].
HOFFMAN, WK ;
KALTER, HL .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1973, SC 8 (05) :298-305
[2]  
KUO C, 1973, ELECTRONICS SEP
[3]   STORAGE ARRAY AND SENSE-REFRESH CIRCUIT FOR SINGLE-TRANSISTOR MEMORY CELLS [J].
STEIN, KU ;
SIHLING, A ;
DOERING, E .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1972, SC 7 (05) :336-&