A STATIC COMPENSATOR MODEL FOR USE WITH ELECTROMAGNETIC TRANSIENTS SIMULATION PROGRAMS

A static var compensator (SVC) model based on state variable techniques is presented. This model is capable of being interfaced to a parent (or host) electromagnetic transients program, and a stable method of interfacing to the EMTDC program, in particular, is described. The model is primarily that of a thyristor controlled reactor (TCR) and a thyristor switched capacitor (TSC). Capacitor switchings within the TSC have been handled in a novel way to simplify storage and computation time requirements. During thyristor switching, the child SVC model is capable of using a smaller timestep than the one used by the parent electromagnetic transients program; after the switching, the SVC model is capable of reverting back to a (larger) timestep compatible with the one used by the parent program. Other features that are considered include the modeling of a phase-locked-loop based valve firing system. The paper ends with the discussion of an application of this model in the simulation of a SVC controlling the ac voltage at the inverter bus of a back-to-back HVdc tie. Keywords: Static compensator model, Transient simulation, Variable timestep, HVdc transmission. © 1990 IEEE