AN INTEGRATED CAD SYSTEM FOR ALGORITHM-SPECIFIC IC DESIGN

被引:23
作者
SHUNG, CB
JAIN, R
RIMEY, K
WANG, E
SRIVASTAVA, MB
RICHARDS, BC
LETTANG, E
AZIM, SK
THON, L
HILFINGER, PN
RABAEY, JM
BRODERSEN, RW
机构
[1] UNIV CALIF LOS ANGELES,DEPT ELECT ENGN,LOS ANGELES,CA 90024
[2] HELSINKI UNIV TECHNOL,DEPT COMP SCI,HELSINKI,FINLAND
[3] UNIV CALIF BERKELEY,DEPT ELECT ENGN & COMP SCI,ELECTR RES LAB,BERKELEY,CA 94720
[4] HEWLETT PACKARD CO,SAN DIEGO,CA
[5] AT&T BELL LABS,ALLENTOWN,PA 18103
关键词
D O I
10.1109/43.75628
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
LAGER is an integrated computer-aided design (CAD) system for algorithm-specific integrated circuit (IC) design, targeted at applications such as speech processing, image processing, telecommunications, and robot control. LAGER provides user interfaces at behavioral, structural, and physical levels and allows easy integration of new CAD tools. LAGER consists of a behavioral mapper and a silicon assembler. The behavioral mapper maps the behavior onto a parameterized structure to produce microcode and parameter values. The silicon assembler then translates the filled-out structural description into a physical layout and with the aid of simulation tools, the user can fine tune the data path by iterating this process. The silicon assembler can also be used without the behavioral mapper for high sample rate applications. A number of algorithm-specific IC's designed with LAGER have been fabricated and tested, and as examples, a robot arm controller chip and a real-time image segmentation chip will be described.
引用
收藏
页码:447 / 463
页数:17
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